Monitoring the stability of the fabricated high k Si MOS capacitors and investigation of the insulator/semiconductor interface

The fabrication of both n and p-type Si MOS capacitors using high k dielectric as insulator deposited by atomic layer deposition technique is presented. The interface obtained between the high k dielectric and the semiconductor substrate, critical for stability and feasibility of the experimental devices, is analyzed using both numerical calculation of the ideal capacitance - voltage (C-V) characteristics of the MOS capacitors and experimental data obtained at high frequency (500 kHz). Accordingly, the effective oxide charge is determined based on the deviation of the flat band voltage from the ideal value, the smallest value (7.3 × 10
¹⁰
cm
^-2
) being obtained for the HfO2/n-Si structure. Using the Terman method, the interface traps density has been calculated, establishing that the HfO
₂
/p-type sample present the best interface on the entire range of energy level in Si band gap. Finally, the stability of the fabricated Si MOS capacitors is monitored by cyclically high frequency C-V measurements with increased starting voltage after each recorded C-V characteristic.