Noise analysis of a BJT-based charge pump for low-noise PLL applications

Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.