Micro processor based advanced bus protection scheme using IEC 61850 process bus (9-2) sampled values

A novel, phase segregated bus differential protection scheme, which utilizes independent multiprinciple advanced protection algorithms, such as, differential percent slope, delta phase directional comparison, rate of change of differential (ROCOD) currents, delta phase directional comparison on zero sequence current differential, fast CT saturation detection, second harmonic blocking and a check zone to secure the electrical bus bars upto three zones (two main and one transfer bus) will be discussed. Various combinations of the bus architectures or topologies can be protected with bus couplers, isolators, and CTs configurations including the end-faults detection capability. The proposed advanced microprocessor based bus protection scheme does not require digital current inputs (sampled values) from Merging Units; instead, it has the ability to measure the conventional CT currents within the protection unit, and will share / distribute the sampled values using IEC 61850, 9-2 protocol, as a Merging Unit with other protection units to perform the overall differential protection. Each protection unit therefore acts as a processing (subscribing sampled values) and as well as a Merging Unit (publishing sampled values). The scheme can be scaled to support up to 24 bays (24 sets of three phase CT current inputs) and a three phase PT voltage input with 4 individual relay protection unit (6 sets of three phase CT current Inputs per relay) functions together as one protection scheme, in a very compact electrical panel (4 × 3U rack units). For time synchronization, additional inputs, and outputs, an I/O unit is used to accommodate the breaker status, isolator status, and any other inputs into the bus protection scheme.