Quantum effect in Nanoscale SOI FINFET device structure: A simulation study

With CMOS technology reaching its scale minima, possibilities of implementing different MOS device variants is being successfully explored by the VLSI design engineers. One of such successful alternative technique is the SOI device design. It is widely being adopted as an alternative to its bulk counterpart due to its inherent advantages such as low processing cost, high reliability, elimination of parasitic capacitance, punch through issue etc. This simulation study is aimed at verifying quantum confinement of the charge carriers within the SOI FINFET device. The quantum confinement effect in the device is inspected through comparing quantum corrected drift-diffusion model with classical drift-diffusion model under strong inversion condition.