Performance investigation of III-V heterosturucture underlap double gate MOSFET for System-On-Chip application

The Analog/Radio Frequency and Linearity analysis of a III-V Heterostructure Underlap Double Gate MOSFET is done using the numerical TCAD device simulator. Heterostructure Underlap DGMOS has evolved as a strong contender for various digital application. In analog and RF circuit application, linearity testing and RF performance confronts as a major problem which develops due to non linearity of the devices. In this paper, different figure of merits like Transconductance(gm), Transconductance Generation Factor (gm/ID), Cut off frequency(fT), Variable Intercept Point of Second order(VIP2)are analyzed. The comparative study with Junctionless Double Gate MOSFET has been carried out. The results reveal that Heterostucture DGMOS shows great promise to become a competitive contender for Analog/Mixed signal System-On-Chip (SOC) application by demonstrating a significant improvement in its RF performance.