Fully-migratable TDC architecture for FPGA devices

The demand for measuring time intervals by means of flexible, low-cost and programmable instruments is constantly growing. Always more frequently multi-channel and high-resolution features come up beside. In this sense, time-to-digital converters (TDCs) are very suited to be implemented into FPGA devices. Moreover a significant surplus value would be the availability of a TDC architecture that can be implemented in different FPGA devices with practically no re-design overhead. In this paper we present a “ TDC component” that can be indifferently implemented in Xilinx and Altera FPGAs with minimum intervention on the design. We have experimentally verified the possibility of implementing the component in devices also very different in terms of structure and availability of resources.