A rapid development technique for prototype FPGA controllers

Advancements in solid state devices, programmable logic devices and Electronic Design Automation (EDA) tools have given a tremendous support to the development of digital controllers. High performance motor controllers usually require complex algorithm and long computation time. This makes the implementation task more complex. Features of parallel processing and high speed computing of Field Programmable Gate Array (FPGA) can be made use to face these challenges. This paper brings out the design procedure of a prototype Space Vector Pulse Width Modulated (SVPWM) FPGA controller. The scheme can be extended to multilevel SVPWM inverters, which require complex algorithm and long computation time. The algorithm is first implemented in SIMULINK models from HDL Coder Library. HDL coder then converts it to optimized and synthesizable Very High Speed Integrated Circuit Hardware Description Language (VHDL) code. The generated code is verified using HDL co-simulation model to make it error free. The code executed on FPGA with the help of a synthesis tool. This prototype FPGA digital controller is experimentally tested on the inverter that drives a 2-HP, 3-phase induction motor. The proposed method help researchers to create, simulate, verify and develop complex systems within short span of time with high degree of accuracy and reliability.