ESD characterisation of a-IGZO TFTs on Si and foil substrates

Amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) Thin-Film Transistors (TFTs) integrated with Si based CMOS processes is an emerging technology in ultra-low power applications. ESD characteristics of a-IGZO TFTs with a Si substrate are studied and compared to their characteristics on traditional foil/glass substrate. The ESD performance is shown to be improved, thanks to improved thermal properties of the different buffer material. The layout dependency of ESD behaviors in Si substrate TFTs are investigated in order to meet the 1kV HBM ESD requirement. An on-chip ESD protection design with a gate-coupling TFT is proposed.