Inserted substrate pickup style with external resistance in an ESD NMOS transistor

Butting and inserted pickup layout in MOSFETs leads to substrate resistance shunting effect and serious ESD robustness degradation. This work develops novel layout with external well/ diffusion resistance embedding between the substrate and the grounding terminal in the NMOS transistors. This layout method can greatly enhance ESD performance of the inserted pickup devices. The second breakdown current of the 1.8V cases improves by 2.7~2.9 times, ESD/HBM threshold increases by 2.3~3.2 times; and the second breakdown current of the 3.3V condition raises by 2.2 times, ESD/ HBM threshold even rises by 10 times.