An implementation method of poisson image editing on FPGA

In this paper, we describe an FPGA system for the real-time processing of Poisson image Editing. Poisson Image Editing is a powerful method to overlay an image on another image seamlessly. In this method, however, a simple equation is repeatedly applied to each pixel, and this repetition makes its computational complexity very high. In our system, a very deep pipeline is used to apply the equation. One repetition is executed on each stage of the pipeline, and all repetitions are applied to all pixels during one scan of the image. In our current implementation, to reduce the circuit size, a color image is scanned three times, for R-, G-, and B-plane, but its processing speed is still fast enough for real-time processing of HD images.