A logic-in-memory design with 3-terminal magnetic tunnel junction function evaluators for convolutional neural networks

Analog implementations of neuromorphic circuits within digital systems are increasingly becoming attractive due to the high throughput and low energy per operation they offer. Magnetic logic devices based on spin-orbit torque offer a pathway to low-power resistive analog circuits. We present the magnetic tunnel junction (MTJ) function evaluator, a design for a logic device that evaluates nonlinear and linear functions for neural networks. We model the device and extend it into a functional design implementation in a logic-in-memory architecture in a hybrid process with magnetic device layers and 45 nm CMOS.