Template attacks based on static power analysis of block ciphers in 45-nm CMOS environment

Side-channel attacks are proven to be efficient tools in attacking cryptographic devices. Dynamic power has been used as a source for many well-known side-channel attack algorithms. As process technology size shrinks, the relative amount of static power consumption increases accordingly, and reaches a significant level in sub-100-nm chips, potentially changing the nature of side-channel analysis. In this paper we propose a type of template attack developed for static power analysis of block ciphers. In addition to the original template distinguisher, the attack is shown to work well using new distinguishers which are faster to compute.