Improving the performance of all-digital transmitter based on parallel delta-sigma modulators through propagation of state registers

In this paper it will be shown that propagating specific state registers in a fully parallel Delta-Sigma Architecture can have a profound impact in enhancing the performance of these type of modulators without stringent requirements in terms of latency and resources usage. An FPGA-based transmitter was implemented and designed to validate the proposed architecture, and to demonstrate that flexible, high-speed and wideband modulators can be implemented with low-complexity and with a low resources usage.