Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology

This paper introduces an analog bandwidth mismatch compensation technique for Time-Interleaved Analog-to-Digital Converters (TI-ADCs). It takes advantage of a Fully Depleted Silicon On Insulator (FD-SOI) technology to compensate for the bandwidth mismatch errors among channels. Our technique utilizes the body-effect to adjust the on-resistance of the sampling switch, by means of a 6-bit Digital-to-Analog-Converter (DAC). Simulations of a 2-channel TI-ADC running at fs= 4GHz shows the effectiveness of the correction. The spurious-free dynamic range (SFDR) is improved from 44.63 dB to 83.12 dB for a sine-wave just below the Nyquist frequency(fNyquist) of 2 GHz.