A DFT for semi-DC fault diagnosis for switched-capacitor circuits

In this paper, a design-for testability (DFT) technique is presented to diagnose switched-capacitor (SC) circuits. In order to avoid the effect that pure DC signals cannot pass through unswitched capacitors, we use a semi-DC signal to diagnose SC circuits. Furthermore, we propose a controllable op amp that can be controlled to normal mode or test mode. In normal mode, it passes the signal normally; in test mode, it provides a semi-DC test signal (VDD or VSS) and blocks the signals from the stage before controlled stage. In our diagnosis method, we consider faults both in capacitors and in op amps. Experiments have been carried out to verify the practicality of this technique.