On random pattern testability of cryptographic VLSI cores

In this paper, we show that the statistical qualities of cryptographic basic operations are the reason for the excellent pseudorandom testability of cryptographic processor cores. For the examination, typical basic operations of modern cryptographic algorithms are categorized in classes and analyzed regarding their pseudorandom properties. As an example, a global BIST for a cryptographic processor core based on the symmetric block encryption algorithm 3WAY is developed and analyzed. Finally, the quality of the proposed test architecture is determined by fault simulations.