FPGA-based structures for on-line FFT and DCT

This paper presents on-line arithmetic structures tailored for use in the FFT and DCT. Due to their small size, several of these modules can be connected together to form larger, more powerful blocks. The digit-serial nature of on-line arithmetic allows valuable pin resources to feed a larger number of arithmetic units than in the conventional case. Additionally, the resolution of the most significant digit first a property of on-line arithmetic allows subsequent calculations to occur at a much earlier stage. As such, performance of the FFT and DCT benefit over conventional and traditional digit-serial FPGA implementations.