Modeling Error Propagation in Programs

As technology keeps scaling, hardware fault rates are predicted to increase in future computer system. Traditional methods use hardware-only techniques that are energy hungry. Researchers have proposed selective software techniques to tolerate hardware faults at lower costs. However, figuring out which instructions to protect for a target fault coverage can be time- consuming through fault injections. Many proposals have tried to solve the problem, but they suffer either lack of accuracy or scalability issue, and are hence difficult to deploy in practice. In my PhD work, I am proposing a systematic model for error propagation in programs that is both scalable and accurate. The method models error propagation from static instruction-level, control-flow-level and memory-levels. Preliminary results show that our proposed method is able to accurately predict the Silent Data Corruption (SDC) rate of programs without fault injections, thus making it scalable.