SRAM design based on carbon nanotube field effect transistor's model with modified parameters

The paper presents a design of SRAM circuit using CNTFET transistors. The complete model describing CNTFET, developed in Stanford University is modified for the purpose of designing a 6T (2×2) SRAM memory cell. The simulation results of the CNTFET SRAM memory cell manifest usability and applicability of the modified CNTFET model in designing digital circuits. The simplified CNTFET model is coded in Verilog-A and is implemented as a symbol in Cadence standard cell libraries. In order to develop a simplified CNTFET model, 430 complete model parameters are studied and estimated. The impact of the complete model parameters over the output and transfer static characteristics has been taken into consideration and parameters with effect lower than 0.0025% are neglected.