BiCMOS Integrated Microfluidic Packaging by Wafer Bonding for Lab-on-Chip Applications

In this paper, a fully BiCMOS integrated microfluidic technology platform for Lab-on Chip (LoC) applications is presented. Fusion bonding and adhesive bonding techniques are applied to realize a 3-wafer-stack integration. A glass wafer is used on top of the BiCMOS wafer and the Si channel wafer to enable simultaneous optical and electrical measurements. An alignment accuracy of less than 1 μm between BiCMOS and channel wafer is achieved while having channel heights between 30 and 100 μm. All the microfluidic process integration steps are kept below 300 °C. The microfluidic inlet and the outlet are positioned on the backside of the wafer stack to provide both the optical inspection and the electrical measurements from the wafer's front side. The developed wafer level integration technique provides high throughput solutions for emerging chemical and biological LoC applications.