New insight on the geometry dependence of BTI in 3D technologies based on experiments and modeling

In this paper we deeply investigate the dependence of BTI with transistor scaling. Unlike PBTI, NBTI is strongly enhanced in narrow devices like Nanowire or Finfet. We clearly prove by means of 3D electrostatic simulations that it is due to a defect density at the Sidewall (SW) of the transistor about 2.5 times higher than the one at the Top Surface (TS).