ESD-improvement comparisons of HV n-/p-LDMOS components by the bulk modulations

HV n-/p-LDMOS devices with the source-side extending into bulk-region to evaluate the electrostatic-discharge (ESD) protection robustness by a TSMC 0.25 μm 60 V process are investigated in this paper. After a systematic analysis, the trigger voltage (V
_t1
) values of the n-LDMOS with the source-side extending into the bulk-end either by uniformly or non-uniformly distributed manners that had decreased with the bulk space interval increasing (the source-side area ratio increased). However, the second breakdown current (I
_t2
) values had increased obviously with this interval increasing. On the other hand, the trigger voltage (V
_t1
) of the p-LDMOS with the source-side extending into bulk-region uniformly had a minimum value being 71.783 V. And, the holding voltage (V
_h
) values decreased a little about 3.2% with the bulk-side modulation. Meanwhile, the second breakdown current (I
_t2
) values increased at least about 23%. Moreover, both the trigger voltage (V
_t1
) and the holding voltage (V
_h
) of n-/p-LDMOS with uneven bulk modulation were smaller than the uniform modulation. And, the second breakdown current (I
_t2
) improvement can be found that the n-LDMOS (2030%) are better than the p-LDMOS (43.1%). Therefore, the ESD-robustness improvement of n-LDMOS by the bulk uneven modulation is obvious in this work. Hence, the n-LDMOS with the bulk uneven modulation could increase the parasitic bulk-resistance (R
_bulk
) efficiently to achieve high anti-ESD ability.