Automation of FPGA based pin muxing for automotive SoC validation

Manual connection of hundreds of port pins to different slave devices on board causes errors in connection, which hampers validation timelines and quality of validation due to limited options of connectivity. For complex SoC design, this poses a big challenge to meet time to market criteria. This paper explains the challenges involved in Post Silicon Validation such as connecting Microcontroller port pins to different slave devices, quality of validation and connection errors. This paper describes the method of using FPGA for connecting SoC to different slave devices using auto generated FPGA logic. This paper explains how automation helps in accelerating the validating cycle and reduction in manual effort.