From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose

3D sequential integration known as Monolithic 3D (M3D) is considered as an alternative solution to CMOS scaling [1]. In this paper, we detail an innovative methodology migrating a 2D Process Design Kit (PDK) and its associated standard cells libraries to a M3D CoolCube™ design platform [2]. This methodology exhibits a significant migration runtime reduction almost regardless of the number of design rules and standard cells layout complexity (multi-patterning) in advanced CMOS nodes. This migration allows gate level evaluation through a Power Performance Area (PPA) analysis and is based on the following assumptions and targets: 1) same mask sequence and model cards on both level 2) identical process node, design rules and parameters on both levels 3) cell on cell approach.