IIR digital filter design implemented on FPGA for myoelectric signals

In order to attenuate the added noise by electric network used by myoelectric signals acquisition equipment, in this research work, it is developed an IIR digital filter implemented on FPGA. This filter removes a specific spectra frequencies without adding noise to the signal, which allows a better performance in the usage that is given to the signals. The filter coefficients are taken and proved from MATLAB functions. Then, those are transferred to the filter design in the FPGA. For this purpose, it was used a Basys 3 of Xilinx Artix-7 family and the design was implemented in Vivado Design Suite. The filtered signal does not present additional noise and it was eliminated the desired frequency.