2D carrier profiles by SSRM and TCAD for root cause analysis of low Vt PFET

Analysis of ultra-shallow junctions has become a critical requirement especially in the advent of new 3D device structures and technologies. Information derived from available traditional tools and concepts is no longer sufficient for use in TCAD tools for device performance optimization. Furthermore, the complex geometry and nanometer scale critical dimensions of current and future technology node devices impose very stringent requirements on characterization and metrology tools. Although not usually viewed as a critical requirement, sample preparation in FINFET characterization of dopant profiles is just as critical as the technique to be employed for the analysis.