Nano-devices with advanced junction engineering and improved energy efficiency

In this paper, the authors have discussed the importance of junction engineering in order to achieve tunnel FET switches with improved performance and better energy efficiency via voltage scaling. Achieving heterojunctions using III-V/silicon with low density of traps seems to be one of the key challenges of these devices. Other direction is to induce electrostatically junctions between 2D electron and hole gases, with the tunneling path aligned with the electrical field and exploiting the effect of dimensionality to achieve a highly abrupt current control. 2D-2D vdW junctions with a large variety of bandgap configurations can be achieved via the use of 2D semiconductor crystals. Finally, some new classes of step slope switches can be realized by combining at least two switching mechanisms in more complex devices: negative capacitance tunnel FETs and phase-change source tunnel FET. With the last types of devices high current blocking capability and very steep slope (<;10mV/decade) can be indeed achieved. The paper show that important innovations originate in the junction engineering at nanoscale, which finally dictates the performance of the three terminal energy efficient switches.