Automatic Flow Selection and Quality-of-Result Estimation for FPGA Placement

This paper seeks to address the disconnect between different stages of the FPGA CAD flow that often adversely affects the quality of results of the implemented designs. In particular, a machine-learning framework is presented, consisting of a suite of classification and regression techniques, to model the underlying relationship between the characteristics of circuits and the best CAD algorithm (and parameters) to use for obtaining an optimized implementation on an FPGA. The efficacy of the framework is demonstrated by applying this framework to the placement stage to recommend the best placement flow for different circuits. Additionally, the framework is used to predict various quality metrics without actually incurring the cost of performing placement and routing.