Process development for CMOS fabrication using minimal fab

CMOS fabrication processes based on clean-localized technology of Minimal fab are introduced in this work. Without a cleanroom, the particle and impurities are locally controlled at each machine and wafer carrier during the fabrication process. Two methods of CMOS inverter fabrication are performed, 1) using only equipment of a minimal fab for entire process on Si bulk wafer and 2) hybridizing the minimal fab with a conventional fab on SOI wafer. Both methods employ thermal diffusion for doping impurities. We have confirmed that both CMOS have good electrical-properties including interface state density.