Impact of e-SiGe S/D processes on FinFET PFET TDDB reliability

The impact of source/drain e-SiGe process engineering on time dependent dielectric breakdown (TDDB) on core PFETs fabricated with bulk FinFET technology is evaluated. It is observed that thicker e-SiGe buffer layer improves the PFETs TDDB. Electrical and physical analysis revealed that with thinner buffer layer, Ge atoms migrate to gate dielectric and accelerate the breakdown mechanisms due to poor surface roughness and stoichiometry. In addition, the process optimization of pre-baking of e-SiGe trench can also improve the TDDB even for relatively thinner buffer layer.