Integer computations with soft GPGPU on FPGAs

This paper explores the capabilities and limitations of soft GPGPU-based computing on fixed-point arithmetic. The work is based on an existing soft GPU architecture which has been improved and extended to cover broader benchmarks. A generic ALU design for modern FPGA architectures is presented. The enhanced ISA includes conditional instructions and global atomic operations. We extended the tool flow with an LLVM-Backend and used the clang frontend to provide an OpenCL compiler. The improved architecture is evaluated against multiple other solutions: a single MicroBlaze soft processor, a Cortex-A9 ARM with the NEON vector coprocessor and equivalent HLS implementations. We have recorded an average speed up of 10-47× over the MicroBlaze and 0.6-3.4× over the ARM with the NEON engine for the smallest and the biggest soft GPU cores, respectively. Although these cores have an area overhead of 6-22× in comparison to the single soft processor solution, they consumed on average 2.8-7.1× less energy to perform the same tasks. We noticed no performance degradation in comparison to the HLS implementations.