Modeling of Short-Circuit-Related Thermal Stress in Aged IGBT Modules

In this paper, the thermal stress on bond wires of aged insulated gate bipolar transistor modules under short-circuit conditions has been studied with respect to different solder delamination levels. To ensure repeatable test conditions, ad-hoc direct bond copper samples with delaminated solder layers have been purposely fabricated. The temperature distribution produced by such abnormal conditions has been modeled first by means of finite-element method simulations and then experimentally validated by means of a nondestructive testing technique, including an ultrafast infrared camera. Results demonstrate a significant imbalance in the surface temperature distribution, which confirms the hypothesis that short-circuit events produce significantly uneven stresses on bond wires.