Hardware implementation of enhanced virtual release advancing for real-time task scheduling

Time complexity is one of the most important requirements for task scheduling algorithms in real-time embedded systems. In order to satisfy this requirement, Enhanced Virtual Release Advancing (EVRA) algorithm [1] was proposed as an effective algorithm with relatively low runtime overhead to shorten response times in the context of Total Bandwidth Server and Earliest Deadline First algorithms. For further reduction of runtime overhead, hardware implementation of EVRA is designed for effectiveness and applicability to actual real-time systems. The implementation targets an ITRON real-time operating system running on an ARM Cortex-A9 processing core with a field-programmable gate array (FPGA). On an evaluation board, the actual runtime overheads were obtained as the number of cycles taken for the algorithm's execution. Evaluation results show that the maximum additional runtime overhead per tick is reduced by up to 30% compared with that of the original (software) virtual release advancing.