Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization

A System-On-Chip (SoC) is a combination of hardware and software which interact to perform a set of functions, usually for some specific application domain. However, with the increasing complexity of both hardware and software, estimating and optimizing the performance of software on SoC during the design process is becoming a difficult objective. The aim of this paper is to show that observability provided by cycle accurate (CA) simulations using virtual platforms available early in the design flow is helping to obtain estimations and to design a software strategy which optimizes software-on-SoC performance, based on some particular metrics. We apply this approach to a case study which tackles the memory wall problem and contributes to its resolution by using software data prefetching technique. We exploit profiling capabilities provided by simulation models, by analyzing the collected data to identify high memory accesses latencies and finally inserting data prefetching instructions in a suitable and non-intuitive way for increasing system execution performance. Bubble sort is used as experimental methodology and the Inverse Discrete Cosine Transform (JPEG IDCT) routine typical from an industrial decoder is used as initial case study. Based on platform simulation observability, we reach an improvement of more than 25% on the overall execution time.