RapidSoC: short turnaround creation of FPGA based SoCs

Field Programmable Gate Arrays (FPGA) offer the opportunity to build individual hardware solutions even for applications which are produced in small quantity. Quite often, these customized Systems-on-Chip (SoC) contain soft-core processors and a selection of standard peripherals. Synthesizing such systems can be time consuming and thus, design space exploration can become a rather long process. In this contribution, we show an approach to substantially speed up the time to create such system implementations. The price for this improved synthesis time is a slightly reduced operating frequency, which is acceptable in many cases. Using a set of benchmark system configurations, we evaluate our approach against state of the art commercial synthesis tools in terms of tool runtime, resource utilization and achieved system clock frequency.