High Accuracy, Multi-output Bandgap Reference Circuit in 16nm FinFet

A CMOS bandgap reference (BGR) circuit with low mismatch spread is proposed. A conventional BGR circuit uses a CMOS error amplifier and its input offset causes large spread in the bandgap output voltage. The proposed BGR circuit does not use a separate error amplifier. Instead, the bipolar transistor pair used to generate ΔVbe acts as input differential pair as well resulting in low mismatch spread. It can generate the typical 1.22V as well as any number of less than 1.22V bandgap outputs simultaneously without requiring a separate voltage divider circuit. As compared to other offset reduction techniques such as chopping which require a clock and extra area, the proposed BGR circuit is very simple to implement. The proposed BGR circuit has been designed in 16nm FinFet technology for a wide temperature range of -40°C to 125°C and supply voltage range of 1.8V ± 10%. The post-layout extracted simulation results and silicon characterization results are in close agreement. The silicon results show that the maximum peak to peak variation is 8mV or 1.3% for a bandgap output of 0.605V. The proposed BGR consumes 340μW power at 1.8V.