Tutorial T3: Thermal Aware Testing of VLSI Circuits and Systems

Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Demand for improved system performance from silicon integrated circuits has caused a significant increase in device density. This, associated with incorporation of power-hungry modules into the system, has resulted in the power consumption of ICs going up by leaps and bounds. Apart from threatening to violate the power-limits set by the designer, the process poses a formidable challenge to the test engineer as well. Due to the substantially high switching activity of a circuit-under-test (CUT), average test mode power is often 2x higher than the normal mode of operation, whereas, the peak power can be up to 30x higher. This excessive test power consumption not only increases the overall chip temperature, but also creates localized overheating - hotspots. Though quite a few techniques have been proposed to reduce test power, they do not necessarily lead to temperature minimization. Temperature increase is a local phenomena and it also depends on power consumption and heat generation of surrounding blocks. With increasing temperature, leakage current increases, causing further increase in power consumption. This may lead to thermal runaway. Hence, there exists a good scope for addressing thermal aware testing at all phases of VLSI testing - circuit level, system level, and in advanced IC design techniques, such as 3D ICs. This tutorial aims at enumerating techniques ensuring thermal safety during test. We propose to address thermal issues both at circuit level and at system level. While the circuit level techniques address the issues in reducing the temperature of individual logic circuitry within a chip, the system level ones deal with test schedule for the modules and test data compression. System-on-Chip and Network-on-Chip test issues will be included from a thermal perspective. Extension to 3D IC test challenges will also be highlighted.