Bit-parallel multipliers for different irreducible polynomials in finite fields

Multiplications in finite fields are crucial due to the fact that they are widely used in areas of cryptography. We propose bit-parallel multipliers in finite fields for trinomials, Equally-Spaced-Polynomials (ESPs), pentanomials, All-One-Polynomials (AOPs), and Successive-One-Polynomials (SOPs). Main improvements of this paper with known results are as follows. First, SOP is first studied for finite field multiplication, which represents a polynomial with successive one. Second, we firstly propose multiplications for different pentanomials. We analyze our design theoretically and its executing time and area usage are given. Our design is well suited for Field Programmable Logic Arrays (FPGAs). We back up the claims with implementations of our design on Altera FPGAs.