Revisiting performance of various delay elements to realize a trigger pulse generator

Various electronic circuits require a trigger pulse to initiate their operations. Circuits capable of producing very precise duration pulses can be utilized to trigger such circuits. Different designs of trigger pulse generator (TPG) circuit realized by employing optimal delay element (DE) and an XOR logic gate have been reviewed in this work. Profound study of programmable and non-programmable DEs (PDEs and NPDEs) have been also presented. These DEs can add a precise delay, mainly in the order of picoseconds, while passing a signal through it. Various design matrices such as duration of incorporated delays (pulse width) and its variability with supply voltages have been considered to evaluate the performance of the reported DEs. Further, this work is extended to realize a TPG circuit based upon the optimal DE found in this study. Based upon the utilized DE i.e. PDE or NPDE, two different realizations of programmable TPG (PTPG) and non-programmable TPG (NPTPG), have been reported. This work also reviews various reported design already available in literature to present a compact, low power, and high frequency TPG circuit. Delay element and XOR circuit are the key circuits for the TPG design presented. This work suggests various possible combinations of DE and XOR circuitry that will help the design engineers to choose an appropriate design based upon their requirements. Various design specification of the reported TPG circuit have been extracted to match with the different application specific requirements. The reported TPG circuit works with a very low supply voltage (700 mV) and proves its effectiveness by producing ultra-thin pulses of pulse duration in the order of ps while consuming minimal amount of power. The modeling of the TPG circuit have been done using predictive technology model (PTM) @ 16-nm technology node with Verilog and the simulation results are extensively verified using SPICE.