10.6 A 30MHz hybrid buck converter with 36mV droop and 125ns 1% settling time for a 1.25A/2ns load transient

Fast load-transient responses are crucial for DC-DC converters to cope with the demands of modern highly integrated system-on-chip (SoC) designs. Various techniques have been proposed to improve transient responses by enhancing the speed of the controller, and/or by increasing the slew rate of the inductor current (SR
_L
), as shown in Fig. 10.6.1. To enhance the speed of the controller, a capacitor-current-sensor (CCS) calibration technique with load-transient optimization (LTO) is proposed for current-mode control in [1], and zero-delay synchronized (ZDS) and quasi-current-mode hysteretic control are proposed in [2] and [3], respectively. Although these converters may achieve near-optimal transient responses (only limited by SR
_L
), the circuit complexity is greatly increased. To increase SR
_L
, multiphase topologies have been widely used [1], [2,4]. For an N-phase converter, SR
_L
can be effectively increased by N times, at the expense of using N bulky inductors that increase both volume and cost. Hybrid schemes that comprise the parallel operation of the DC-DC converter and a linear regulator can improve the responses by injecting additional charging current (I
_ch
) without adding extra inductors. In [5], activating and deactivating the hybrid scheme is accomplished by monitoring the output voltage V
_o
within the steady-state window [V
_o
-ΔV
_o
, V
_o
]. However, a large ΔV
_o
is needed for good noise immunity, and the slow SR
_L
also requires a high I
_ch
that increases loss during the transients.