C-band direct digital receiver MMIC

A new direct conversion and high speed uni-mode (QPSK) receiver designed with MMICs is proposed for 5.8 GHz ISM-band communications. The receiver architecture consists of one MMIC module for receiver front-end to include a six-port based circuit with matched RF detectors and low noise amplifiers (LNAs). A second module of receiver is designed with hybrid integrated circuits (HIC) and it performs all base-band functions including amplification of output signals from the six-port, carrier recovery and I-Q decoder circuit. The maximum bit rate (at least 50 Mbps) is determined solely by analog circuitry and the limit is directly related to the sensitivity of signal level comparators. The receiver designed with MMIC module is proposed as a low cost robust receiver for high data-rates applications. Simulation results are presented for MMIC prototype and measurements are given for equivalent HICs.