Non-binary cyclic ADC with correlated level shifting technique

A proof-of-concept non-binary cyclic ADC with proposed correlated level shifting (CLS) technique is designed and fabricated in 90nm CMOS technology. By applying the odd/even structure to a multiplying digital-to-analog converter (MDAC), the amplifier with CLS can be used for a cyclic ADC, so that the allowable dynamic range of the proposed cyclic ADC almost is doubled comparing to the conventional cyclic ADC. As a result, the SNDR of ADC can be improved with smaller power penalty. Measurement results of the prototype confirm the effectiveness of the proposed CLS technique for cyclic ADC.