Full-ZVS modulation for all-SiC ISOP-type isolated front end (IFE) solid-state transformer

Thanks to their comparatively low system complexity, SSTs based on an isolated front end (IFE) approach are suitable for space and weight-constrained medium voltage (MV) AC to low voltage (LV) DC power supply applications, e.g., in future traction, naval, subsea or aerospace systems. The IFE approach connects series resonant isolation stages operating in the half-cycle discontinuous-conduction-mode (HC-DCM) directly to the MV AC grid in an input-series, output-parallel (ISOP) configuration, but the entire control, i.e., the shaping of the grid current for unity power factor and output voltage regulation, is carried out by a second, non-isolated conversion stage on the LV side. However, since the isolation stages do not operate with a DC but with an AC or |AC| input voltage, the transformer magnetizing current available for ZVS as well as the voltage to be switched vary over the grid period. Taking into account also component tolerances among the cascaded converter cells, this paper provides an in-depth analysis of the ZVS behavior under these conditions, and of the associated losses and EMI considerations, presenting a loss-optimal choice of the magnetizing inductance value and of the dead time (interlock time) of the isolation stages' bridge legs. A time-dependent variation of the latter to achieve ZVS over the entire grid period without an increase of the isolation stage losses is proposed. The considerations are verified at the example of the Swiss SST (S
³
T), an all-SiC 25 kW, 6.6 kV MVAC to 400 V LVDC converter system, using a detailed simulation model, including non-linear MOSFET capacitances.