Simulation-based study on the effect of inversion charge layer on triple material double gate Tunnel FET

The impact of inversion charge layer on triple material double gate (TMDG) Tunnel FET (TFET) has been inspected in this work by using 2D TCAD simulations. Simulation results show that band-to-band tunneling current saturates due to inversion layer formation. Inversion charges cause the pinning of surface potential and make drain current less responsive to gate voltage. The contribution of source and drain in forming the inversion layer is measured quantitatively. The influence of different device parameters on inversion layer formation has also been inspected.