94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load

This paper reports two four-way 94-GHz power amplifiers (PAs) for radar sensors in 90-nm CMOS technology. The first PA (PA1) comprises a two-stage common-source (CS) cascaded input stage with wideband π -match input, interstage and output networks, followed by a two-way CS gain stage using Y-shaped divider and combiner, and a four-way CS output stage using dual Y-shaped divider and combiner. At each branch's input terminal (i.e., drain terminal of the parallel CS output stage), the low-loss dual Y-shaped combiners can convert the serial RL load into the impedance for optimal output power (Pout) and power-added efficiency (PAE). To enhance power gain and PAE performance, the second PA (PA2) adopts a two-stage positive-feedback CS cascaded input stage using λ/2 transmission line. The circuit architecture of the gain and output stages is the same as that of PA1. PA1 achieves power gain of 16, 21, and 12 dB, respectively, at 60, 77, and 94 GHz. In addition, PA1 achieves P
_out
of 13.2, 12, and 10.6 dBm, respectively, at 60, 77, and 94 GHz. The corresponding peak PAE is 20%, 16%, and 10.2%, respectively, at 60, 77, and 94 GHz. At 94 GHz, PA2 achieves power gain of 20 dB, Pout of 16.8 dBm, and peak PAE of 16.4%. The overall performance of the two CMOS PAs is remarkable in V -band and W -band.