A continuous-time direct RF-to-digital ΔΣ receiver

This paper presents a 3
^rd
-order continuous-time direct RF-to-digital ΔΣ receiver architecture for flexible receivers. Adopted passive mixer with inherited high-Q bandpass filtering and passive integrator enables a low complexity and low power consumption implementation. Moreover, high flexibility can be achieved thanks to a flexible frequency plan of the architecture. In order to verify the features of this proposed architecture, a design example with 10 MHz useful baseband bandwidth and 0.4-4.0 GHz frequency range is conducted.