Design of low power VLSI-architecture and ASIC implementation of fuzzy logic based automatic car-parking system

In this work, the overall system design of the automatic car-parking application has been presented where its non-linear control estimation is based on the fuzzy logic control (FLC) model. Finite state machine (FSM) based central controller has been used to operate such FLC model. It performs a series of operations required for the real-time car-parking process. Subsequently, the defuzzifier architecture has been further optimized using resource sharing technique which reduces the overall chip area and power consumption of the proposed car parking system. Additionally, we have discussed the results from field-programmable gate-array (FPGA) synthesis and application-specific integrated-circuit (ASIC) implementations of the suggested architecture and compared with the conventional architecture. Functional verification of the design using simulation tool for a similar set of inputs has been performed in this work. Thus, the suggested architecture occupies an area of 46335 μm
²
and consumes a total power of 0.06254 mW at 60 MHz, when synthesized and post-layout simulated in 180 nm complementary metal-oxide semiconductor (CMOS) technology node.