Discussion on control structure modifications using an FPGA for predictive DITC in switched reluctance machines regarding LUT resolution

Commonly torque ripple reduction in switched reluctance machines (SRM) is achieved with model predictive control methods, such as hysteresis or pulse width method based direct instantaneous torque control (DITC). This paper discusses the effect and possibilities when reducing the number and size of look-up tables (LUT) necessary to model the SRM in predictive DITC. The goal to only use one look-up table in the control structure is investigated for a 70 kW 18/12 automotive and a 1kW 16/12 laboratory SRM. Furthermore, a method for flux linkage allocation for DITC, when using an FPGA in the control, is presented.