A low-power K-band divide-by-5 injection-locked frequency divider

A low-power K-band divide-by-5 injection-locked frequency divider (ILFD) implemented in the 0.18-μm CMOS process technology is proposed in this paper. By utilizing a differential injected pair formed by cross-coupled transistors and a stacked cross-coupled pair architecture, the fourth order harmonic of the proposed ILFD is enhanced to realize divide-by-5 function without adopting an LC filter. Thus, its performances are improved, including the power consumption and the locking range without using tuning varactors. A built-in balun is adopted before the gate terminals of the injected transistors to generate the differential input signals. The input locking range of the proposed divide-by-5 ILFD is from 21.1 to 22.1 GHz under 0-dBm input power levels, corresponding to 1-GHz maximum locking range. The core circuit only consumes a 3.75 mW dc power from a 1.5-V supply.