Implementation of Locally-Clocked XBM State Machines on FPGAs Using Synchronous CAD Tools

Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the control unit design of complex digital systems. These systems can present serious problems related to the global clock. In this context, the asynchronous paradigm shows interesting features that fit as an alternative for the design, despite of the difficulties of the application of asynchronous logic. An interesting architecture for the Asynchronous Finite State Machines (AFSM) is based on local clock, because it reduces the requirements of asynchronous logic. This manuscript proposes a novel architecture of local clock for AFSMs, which is described by a popular specification known as Extended Burst-Mode (XBM). This architecture presents a better latency time when compared with other local clock architectures. Furthermore, the manuscript proposes a “necessary and sufficient” condition for local clock AFSMs to be synthesized completely on the proposed architecture by using only conventional tools. Through a case study, we present the architecture, its robustness, the synthesis procedure and a comparison with other local clock architectures, highlighting its advantages.